ADuM4121 High Voltage, Isolated Gate Driver with Internal Miller Clamp, 2 A Output with Thermal Shutdown

Product Details

The ADuM4121/ADuM4121-1 are 2 A isolated, single-channel drivers that employ Analog Devices, Inc.’s iCoupler® technology to provide precision isolation. The ADuM4121/ADuM4121-1 provide 5 kV rms isolation in the wide-body, 8-lead SOIC package. Combining high speed CMOS and monolithic transformer technology, these isolation components provide outstanding performance characteristics superior to alternatives such as the combination of pulse transformers and gate drivers.

The ADuM4121/ADuM4121-1 operate with an input supply ranging from 2.5 V to 6.5 V, providing compatibility with lower voltage systems. In comparison to gate drivers that employ high voltage level translation methodologies, the ADuM4121/ ADuM4121-1 offer the benefit of true, galvanic isolation between the input and the output.

The ADuM4121/ADuM4121-1 include an internal Miller clamp that activates at 2 V on the falling edge of the gate drive output, supplying the driven gate with a lower impedance path to reduce the chance of Miller capacitance induced turn on.

Options exists to allow the thermal shutdown to be enabled or disabled. As a result, the ADuM4121/ADuM4121-1 provide reliable control over the switching characteristics of insulated gate bipolar transistor (IGBT)/metal oxide semiconductor field, effect transistor (MOSFET) configurations over a wide range of switching voltages.


  • Switching power supplies
  • Isolated IGBT/MOSFET gate drives
  • Industrial inverters
  • Gallium nitride (GaN)/silicon carbide (SiC) power devices

Features and Benefits

  • 2 A peak output current (<2 Ω RDSON)
  • 2.5 V to 6.5 V input 
  • 4.5 V to 35 V output 
  • Undervoltage lockout (UVLO) at 2.5 V VDD1 
  • Multiple UVLO options on VDD2
    • Grade A: 4.4 V (typical) UVLO on VDD2
    • Grade B: 7.3 V (typical) UVLO on VDD2
    • Grade C: 11.3 V (typical) UVLO on VDD2
  • Precise timing characteristics
    • 53 ns maximum isolator and driver propagation delay
  • CMOS input logic levels
  • High junction temperature operation: 125°C
  • High common-mode transient immunity: >150 kV/µs
  • Default low output
  • Internal Miller clamp
  • Safety and regulatory approvals (pending) 
    • UL recognition per UL 1577 
    • 5 kV rms for 1 minute SOIC long package
  • CSA Component Acceptance Notice 5A
  • VDE certificate of conformity (pending)
    • DIN V VDE V 0884-10 (VDE V 0884-10): 2006-12
    • VIORM = 849 V peak
  • Wide body, 8-lead SOIC